The LE/FT lab performs research on applied information theory, emphasizing methods of probabilistic inference in Bayesian networks, factor graphs and related techniques. Our projects cover applications in digital communication, electronic circuits, and the interface between circuits and biology. The majority of our activities are centered on error correction codes and decoders, particularly algorithms for decoding low-density parity-check (LDPC) codes.
Chris Winstead, “Low energy fault-tolerant systems,” GDR-ISIS meeting, Telecom ParisTech, July 2013.
Yi Luo and Chris Winstead, “Ultra Wideband System for Cortical Interfaces,” IEEE Solid State Circuits Society, Utah Chapter Spring Seminar, poster presentation, April 2013.
Gopalakrishnan Sundararajan and Chris Winstead, “A winner-take-all circuit with improved tolerance to mismatch and process variations,” IEEE Solid State Circuits Society, Utah Chapter Spring Seminar, poster presentation, best poster award, April 2013.
- Eduardo Monzon, Abiezer Tejeda, Chris Winstead, ``Using Kernel Density Estimators to Detect Bistable States in Stochastic Simulations of Genetic Circuits,'' 9th International Workshop on Computational Systems Biology, Ulm, June 2012.
- Eduardo Monzon, Abiezer Tejeda, Chris Winstead, Chris Myers and Curtis Madsen, ``Detecting Multistability in Stochastic Simulations of Gene Networks Using Kernel Density Estimators,'' International Workshop on Biological Design Automation (IWBDA), San Francisco, June 2012.
- Chris Winstead, Yangyang Tang and Gopalakrishnan Sundardaramanian, ``Techniques and prospects for fault-tolerance in post-CMOS ULSI,'' 2012 International Workshop on Post-Binary ULSI, Victoria, Canada, May 2012.
- Eduardo Monzon, Chris Winstead, Abiezer Tejeda and Charles Miller, ``Stochastic Resonance Optimization of a Genetic Quorum-Mediated Trigger Circuit,'' International Workshop on Biological Design Automation (IWBDA), San Diego, June 2011.
- Abiezer Tejeda, Eduardo Monzon, Curtis Madsen, Chris Winstead and Chris Myers, ``Resolving variable dependencies in the MPDE-iSSA algorithm,'' International Workshop on Biological Design Automation (IWBDA), San Fransisco, June 2010.
- Eduardo Monzon, Abiezer Tejeda, Yi Luo and Chris Winstead, ``An alternative TMR method for fault-tolerant logic,'' CMOS Emerging Technologies Workshop, Whistler, BC, Canada, May 2010.
- C. Madsen, C. J. Myers, N. Roehner, C. Winstead, and Z. Zhang, “Efficient analysis methods in synthetic biology,” in Computational methods in synthetic biology, ed. Mario Andrea Marchisio, Springer, 2013. [Link]
- Chris Winstead and Christian Schlegel, "Energy Limits of Message-Passing Error Control Decoders," International Zurich Seminar on Communications (IZS), February 2014. [Article and Slides].
- Ryan Gerdes, Chris Winstead and Kevin Heaslip,“An efficiency-motivated attack against autonomous vehicular transportation,” Annual Computer Security Applications Conference (ACSAC), Dec 2013. [Open Access].
- Gopalakrishnan Sundararajan and Chris Winstead, “A Winner-Take-All Circuit with Improved Accuracy and Tolerance to Mismatch and Process Variations,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), August 2013. [Xplore]
- David Toribio and Chris Winstead, “Performance of a High-Speed Transcutaneous Link with Error Correction Coding,” IEEE Engineering in Medicine and Biology Conference (EMBC), July 2013. [Xplore]
- Yangyang Tang, Emmanuel Boutillon, Chris Winstead, Christophe Jego and Michel Jezequel, “Muller C-element based Decoder (MCD): A Decoder Against Transient Faults,” IEEE International Sympo- sium on Circuits and Systems (ISCAS), May 2013. [Xplore]
- Chris Winstead, Yi Luo, ``Error correction circuits for bio-implantable electronics,'' IEEE Midwest Symposium on Circuits and Systems (MWSCAS), Invited Paper, Aug 2012. [Xplore]
- Yi Luo, Chris Winstead and Patrick Chiang, ``125Mbps Ultra-Wideband System Evaluation for Cortical Implant Devices,'' IEEE Engineering in Medicine and Biology Conference (EMBC), Aug 2012. [Xplore]
- Chris Winstead, Yangyang Tang, Emmanuel Boutillon, Christophe Jego, and Michel Jezéquel, ``A Space-Time Redundancy Technique for Embedded Stochastic Error Correction in Digital Logic Systems,'' International Symposium on Turbo Codes (ISTC), Aug. 2012. [Xplore]
- Yangyang Tang, Chris Winstead, Emmanuel Boutillon, Christophe Jego, and Michel Jezéquel, ``An LDPC Decoding Method for Fault-Tolerant Digital Logic,'' IEEE International Symposium on Circuits and Systems (ISCAS), May 2012. [Xplore]
- Curtis Madsen, Chris Myers, Nicholas Roehner, Chris Winstead and Zhen Zhang, ``Utilizing stochastic model checking to analyze genetic circuits,'' 2012 Conference on Computational Intelligence in Bioinformatics and Computational Biology, Best student paper award, May 2012. [Xplore]
- Chris Winstead, Abiezer Tejeda, Eduardo Monzon, Yi Luo, ``An error-correction method for binary and multiple-valued logic,'' IEEE International Symposium on Multiple-Valued Logic, Tuusala, Finland, May 2011. [Xplore]
- Chris Winstead, Chris J. Myers, Curtis Madsen, ``iSSA: An Incremental Stochastic Simulation Algorithm for Genetic Circuits,'' International Symposium on Circuits and Systems (ISCAS), invited special session on synthetic biology, Paris, May 2010. [Xplore]
- C. Madsen, Z. Zhang, N. Roehner, C. Winstead, and C. J. Myers, “Stochastic model checking of genetic circuits,” ACM Journal on Emerging Technologies in Computing Systems (JETC), January, 2015. (In Press)
- Chris Winstead and Emmanuel Boutillon, "Decoding LDPC Codes with Locally Maximum-Likelihood Binary Messages," IEEE Communication Letters, 2014. (Accepted)
- Gopalakrishnan Sundararajan, Chris Winstead and Emmanuel Boutillon, "Noisy gradient bit-flip decoding for LDPC codes," IEEE Transactions on Communications, vol. 62, no. 10, October, 2014. [Xplore] [arXiv prepint].
- Chris Winstead, Abiezer Tejeda, Eduardo Monzon, Yi Luo, ``Error Correction via Restorative Feedback in M-ary Logic Circuits,'' Journal of Multiple Valued Logic and Soft Computing, vol. 23, no. 3--4, pp. 337--363, 2014. [Open Access]
- Chris Winstead and Joachim Neves Rodrigues, ``Ultra Low Power Error Correction Circuits - Technology Scaling and Sub-VT operation,'' IEEE Trans. on Circuits and Systems II, December 2012. [Open Access]
- Curtis Madsen, Chris J. Myers, Tyler Patterson, Nicholas Roehner, Jason Stevens, Chris Winstead,``Design and Test of Genetic Circuits using iBioSim,'' IEEE Design and Test of Computers, Feb 2012. [Xplore]
- Chris Winstead, Saeed Sharifi Tehrani, Shie Mannor, Warren J. Gross, Sheryl Howard, Vincent C. Gaudet, ``Relaxation Dynamics in Stochastic Iterative Decoders,'' IEEE Trans. on Signal Processing, November, 2010. [Xplore]
- Nam Nguyen, Chris Myers, Hiro Kuwahara, Chris Winstead and James Keener, ``Design and analysis of a robust genetic Muller C-element,'' Journal of Theoretical Biology, 2010. [PubMed]
- Chris Winstead, ``C-element multiplexing for fault-tolerant logic circuits,'' IET Electronics Letters, Sept. 2009. [Xplore]
- Chris Winstead and Sheryl Howard, ``A probabilistic LDPC-coded fault compensation technique for reliable nano-scale computing'' IEEE Transactions on Circuits and Systems II - Express Briefs, June, 2009. [Xplore]
- Rebecca Lewis, Katie-Ann Stirling, Chris Winstead, Nathan Folkner and Mandar Padmawar, ``Design and initial test results for an equine distress monitor system,'' Journal of Equine Veterinary Science, May 2009.
- Chris Winstead and Mohamad El Hamoui, ``Reducing clock jitter by using Muller-C gates,'' IET Electronics Letters, January, 2009. [Xplore]
- David Haley, Chris Winstead, Vincent Gaudet, Christian Schlegel, ``A dual-function mixed-signal circuit for LDPC encoding/decoding ,'' Integration: the VLSI Journal, 2008. [Science Direct]
- Manohar Kashyap and Chris Winstead, ``Decoding LDPC Convolutional Codes on Markov Channels,'' EURASIP Journal on Wireless Communications and Networking, Article ID 729180, 8 pages, 2008. doi:10.1155/2008/729180. [Open Access]
- Mimi Yiu, Chris Winstead, Vincent Gaudet and Christian Schlegel, ``Design for Testability of CMOS Analog Sum-Product Error Control Decoders,'' IEEE Trans. on Circuits and Systems II: Express Briefs. pp. 675-680, vol. 54, no. 8, Aug. 2007. [Xplore]
- Chris Winstead, N. Nguyen, V. Gaudet, C. Schlegel, ``Low-voltage CMOS circuits for analog iterative decoders,'' IEEE Trans on Circuits and Systems I, pp. 829-841, vol. 53, no. 4, April, 2006. [Xplore]
- Chris Winstead, J. Dai, S. Yu, C. Myers, R. Harrison, C. Schlegel. ``CMOS analog MAP decoder for (8,4) Hamming code.'' IEEE Journal of Solid-State Circuits, pp. 121-131, vol. 39, no. 1, Jan. 2004. [Xplore]